An improved probing method aims to eliminate uncertainties for loop inductance measurements. This paper looks at the properties and effects on the measurement of two different via structures in a ...

Fig. 1. Ideal hard switching showing: (a) Turn-off transition and (b) Turn-on transition. During the voltage rising period, the device encounters both current and voltage in the device, resulting in ...

With the significant reduction in package parasitics provided by the eGaN FET, the package inductance is minimized and is no longer the major parasitic loss contributor. The high frequency loop ...

The previous columns in this series discussed the benefits of eGaN® FETs and their potential to achieve higher efficiencies and higher switching speeds than possible with silicon MOSFETs. This ...